1. Technical Field
The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device. In particular, the present invention relates to a semiconductor device and a method of manufacturing a semiconductor device in which a stress is constrained during wire bonding even if a conductive material flows from the central area of a conductive pad to a peripheral area.
2. Related Art
In order to downsize a semiconductor device, a technology for placing an electrode pad on an active surface where transistors are formed is under development. JPA2003-0866210 (see FIG. 1) is an example of the related art.
FIG. 14 is a cross section showing a conventional method of manufacturing a semiconductor device. The semiconductor device shown in this figure has a transistor formed on a silicon substrate 101. A first interlayer insulation film 108 is formed on a transistor and an element isolation film 102. Aluminum alloy wires 109a and 109b are formed on the first interlayer insulation layer 108. Each of aluminum alloy wires 109a and 109b is connected to each of impurity regions 107a and 107b respectively, which become source and drain regions of a transistor.
A second interlayer insulation layer 110 is formed on the first interlayer insulation film 108 and aluminum alloy wires 109a and 109b. An aluminum alloy pad 111 is formed on the second interlayer insulation layer 110. The end of the aluminum alloy pad 111 is above the transistor.
A passivation film 113 is formed on the second interlayer insulation layer 110 and the aluminum alloy pad 111. The passivation film 113 has an opening 113a located in the center of the aluminum alloy pad 111. A wire (not shown) is bonded to a part of the aluminum alloy pad 111 positioned in the opening 113a. 
A power is occasionally given to the central area of the conductive pad when a wire is bonded to a conductive pad. In this case, a conductive material constituting a pad flows from the central area to peripheral area, generating a stress at the end of a pad. This stress occasionally causes cracks in a part of the interlayer insulation layer located under the end of a pad. Further, the stress has possibility of destroying elements such as transistors.
Further, the stress retains at the end of the pad when no crack is yielded, changing electrical characteristics of an element (a transistor for example) located under the end of a pad.